Semiconductor memory manufacturing technology allows the creation of high density memory arrays on an integrated circuit chip. Such memory arrays consist of many memory cells, each cell capable of storing one data bit. Dynamic random access memories (DRAMs) are manufactured with a storage capacity as high as 64 megabits. Static random access memories (SRAMs) are manufactured with a storage capacity as high as 4 megabits. Future technological advances are expected to further increase memory storage capacity.
By limiting the number of data bits in the memory cell array which can be accessed simultaneously (the bit width), the memory cell array density is increased, thereby increasing the storage capacity of the memory cell array. However, a smaller bit width increases the time required to test the memory array. For example, only one bit can be written into or read from a memory cell array having a bit width of one. To read and write both a "0" state and a "1" state, a 16 megabit memory having a single bit width must be accessed 64 million times. It is desirable to reduce the time required to test large memory arrays by reducing the number of times the array is accessed.